PEAKDETMODE=ONCECMD, MODE=XTAL, LFTIMEOUT=0CYCLES
HFXO Control Register
| MODE | HFXO Mode 0 (XTAL): 4 MHz - 50 MHz crystal oscillator 1 (ACBUFEXTCLK): An AC coupled buffer is coupled in series with HFXTAL_N pin, suitable for external sinus wave. 2 (DCBUFEXTCLK): A DC coupled buffer is coupled in series with HFXTAL_N pin, suitable for external sinus wave. 3 (DIGEXTCLK): Digital external clock can be supplied on HFXTAL_N pin. |
| HFXOX2EN | Enable Double Frequency on HFXOX2 Clock (compared to HFXO Clock) |
| PEAKDETMODE | HFXO Automatic Peak Detection Mode 0 (ONCECMD): Automatic control of HFXO peak detection sequence. Only performs peak detection on initial HFXO startup. CMU_CMD HFXOPEAKDETSTART allowed to be used after HFXORDY=1. 1 (AUTOCMD): Automatic control of HFXO peak detection sequence. CMU_CMD HFXOPEAKDETSTART allowed to be used after HFXORDY=1. 2 (CMD): CMU_CMD HFXOPEAKDETSTART can be used to trigger the peak detection sequence after HFXORDY=1. 3 (MANUAL): CMU_HFXOSTEADYSTATECTRL IBTRIMXOCORE and PEAKDETEN are under full software control and are allowed to be changed once HFXO is ready. |
| LFTIMEOUT | HFXO Low Frequency Timeout 0 (0CYCLES): Timeout period of 0 cycles (disabled) 1 (2CYCLES): Timeout period of 2 cycles 2 (4CYCLES): Timeout period of 4 cycles 3 (16CYCLES): Timeout period of 16 cycles 4 (32CYCLES): Timeout period of 32 cycles 5 (64CYCLES): Timeout period of 64 cycles 6 (1KCYCLES): Timeout period of 1024 cycles 7 (4KCYCLES): Timeout period of 4096 cycles |
| AUTOSTARTEM0EM1 | Automatically Start of HFXO Upon EM0/EM1 Entry From EM2/EM3 |
| AUTOSTARTSELEM0EM1 | Automatically Start and Select of HFXO Upon EM0/EM1 Entry From EM2/EM3 |